The present invention pertains to the field of power management in a computer system. More particularly, this invention pertains to the field of power managing display devices in a computer system.
Display devices for interfacing computer systems with external displays such as televisions, flat panel Liquid Crystal Displays (LCDs), and digital television are now being regularly included in computer systems. Such devices receive either RGB or YUV data from a graphics controller and produce an output that is suitable for viewing on a television, LCD, or digital television. The ability for a computer system to interface with these types of displays is becoming more and more important as computer systems are integrated into user""s living rooms and as computer systems take on newer tasks such as movie or television viewing, multi-player game playing over the Internet, video telephoning, etc.
A de facto standard has evolved among various computer industry companies for interfacing display devices with graphics controllers. The de facto standard includes several clock and control signals, including a clock in signal, a clock out signal, a blanking signal, a vertical sync signal, and a horizontal sync signal. The de facto standard also includes an eight bit data bus. As mentioned above, either RGB or YUV data is delivered over the data bus.
A major concern among computer users and manufacturers has been that of power management. One power management standard that has gained wide acceptance in the computer industry is the Advanced Configuration and Power Interface (ACPI) revision 1.0a open industry specification co-developed by Intel(copyright), Microsoft, and Toshiba. Under the ACPI specification, an operating system is capable of checking the status of all ACPI compliant devices in the system. Based on the status of the various devices, the operating system may program a device in one of four possible states. The possible states are D0, where the device is fully on, and D1 through D3, with each of the D1 through D3 states indicating a level of power down.
As computer systems are interfaced with external displays such as television, flat panel displays, and digital television, it becomes desirable to power manage these external displays. The current de facto industry standard for interfacing display devices to graphics controllers does not provide a mechanism for passing power management information to and from the display devices.
A method and apparatus for power managing a display device are disclosed. The apparatus includes a clock output circuit to output a clock signal and also includes a display device control signal input/output circuit to output a display device control signal. The apparatus further includes a display device data bus input/output circuit to output an encoded information on a display device data bus when the display device control signal output circuit asserts the display device control signal, the encoded information to represent a power management state.